Reverse engineering ZIOVA CS615: Difference between revisions
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== Pinout UART == | == Pinout UART == | ||
X X TX X | <pre> | ||
X X TX X GND | |||
. X RX X X | |||
</pre> | |||
X:pin<br> | |||
.:nopin<br> | |||
TX: Transmit (box)<br> | |||
RX: Read (box)<br> | |||
GND: Ground<br> | |||
== Connecting to TTL usb cable == | |||
To connect to FT232R (6-pole plug): | |||
:Ground to black | |||
:RX on system to TX on cable (orange) | |||
:TX on system to RX on cable (yellow) | |||
Serial configuration is 115200 baud 8N1 | |||
= Hardware = | = Hardware = | ||
<pre> | |||
CS615[bin]$ cat /proc/cpuinfo | CS615[bin]$ cat /proc/cpuinfo | ||
system type : Sigma Designs TangoX | system type : Sigma Designs TangoX | ||
| Line 25: | Line 41: | ||
CPU frequency : 297000000 Hz | CPU frequency : 297000000 Hz | ||
DSP frequency : 297000000 Hz | DSP frequency : 297000000 Hz | ||
</pre> | |||
=Dumps= | =Dumps= | ||
[[ZIOVA CS615 boot]] | [[ZIOVA CS615 boot]] | ||
[[Category:Projects]] | |||
[[Category:Reverse enginering]] | |||
Latest revision as of 19:11, 30 May 2012
Inside
Pinout UART
X X TX X GND . X RX X X
X:pin
.:nopin
TX: Transmit (box)
RX: Read (box)
GND: Ground
Connecting to TTL usb cable
To connect to FT232R (6-pole plug):
- Ground to black
- RX on system to TX on cable (orange)
- TX on system to RX on cable (yellow)
Serial configuration is 115200 baud 8N1
Hardware
CS615[bin]$ cat /proc/cpuinfo system type : Sigma Designs TangoX processor : 0 cpu model : MIPS 4KEc V6.9 Initial BogoMIPS : 291.84 wait instruction : yes microsecond timers : yes tlb_entries : 32 extra interrupt vector : yes hardware watchpoint : yes ASEs implemented : mips16 VCED exceptions : not available VCEI exceptions : not available System bus frequency : 198000000 Hz CPU frequency : 297000000 Hz DSP frequency : 297000000 Hz